Wednesday, April 19, 2017

Sony Unveils Full-Frame Stacked Sensor

Sony presents a new A9 flagship full-frame ILC featuring 24MP stacked sensor. The stacking allows:

  • up to 20 fps speed,
  • viewfinder or display blackout-free shooting,
  • up to 60 AF/AE tracking calculations per second,
  • silent vibration-free electronic shutter speeds up to 1/32000 sec.
  • Anti-Distortion Shutter operation that minimizes distortion of moving subjects
  • Full pixel array readout with no pixel binning for oversampled 4K 30p video



SonyAlphaRumors publishes a number of slides on the new image sensor:

12 comments:

  1. "Full frame", a typo in the title.

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  2. 3rd image is just the second image with less of the text but with an added "useless" button on top left. - did i miss something? maybe some different image was meant to be posted here.

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  3. Is this the same stack technology as the ISSCC paper in Feb, in the Experia XZ Motioneye camera?

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    1. Albert Theuwissen - Harvest ImagingApril 20, 2017 at 6:37 PM

      I do not know for sure, but I don't think so. The ISSCC paper had 3 layers of silicon and in this Sony presentation I do see only 2 layers. But the device in this presentation is a very large one, so the large supporting chip can easily have memory and processing on-board without the need for an extra layer with DRAM. So after all, this presentation still may have the same functionality as the ISSCC paper, but only with two layers of silicon and not three.
      If someone has another opinion .... ???

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    2. DRAM is generally not integrated on one die with advanced logic process nodes, so unlikely that we are seeing folding of two die into one.

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    3. Sony may have e-DRAM technology since I seem to remember Toshiba used to use embedded trench DRAM in some of the game processors that they made for Sony - mind you, that was quite a few years ago!

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  4. I think I've answered my own question after looking at the video - looks like a CIS/memory package stack, with a separate Bionz processor. Not a three-layer stack with TSVs.

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    1. Albert Theuwissen - Harvest ImagingApril 23, 2017 at 9:22 AM

      I am not 100 % sure if you are right. On the picture they show (second one of the three), they clearly indicate a memory part together with processing on one chip. But of course you never know whether this is the exact structure in silicon as well ...
      On the other hand, it does not matter that much, after all it is a great piece of technology !!!

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  5. @Dick James - "Stacked" means more of the front-side circuitry is moved to the back; it is more "BSI" than BSI. In addition to moving some more of the circuitry from front to back they can add additional layers to enable PDAF and increase the Readout Speed.

    This Sensor is 'like' the Xperia XZ / Z Pro etc. (960 FPS Cellphone Sensor) except the DRAM is not as large (capable of such high speed) and the physical size is Full Frame (that's the "new" part, Full Frame).

    See: https://www.xda-developers.com/sony-imx378-comprehensive-breakdown-of-the-google-pixels-sensor-and-its-features/ and Mark Weir of Sony: https://youtu.be/oG2UPQfPNDs?list=PLWa6uO3ZUweB_LFvUpNPoxUs-9CtqFKN0 or even Wikipedia.

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  6. The IMX400 Stacked Sensor is detailed in this Article: http://image-sensors-world.blogspot.ca/2017/05/techinsights-publishes-sony-3-layer.html .

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